www.iterrac.com IT5025 40-gb/s, 8-vpp optical modulator driver june 9, 2006 doc. 4074 rev 1 1 iterra communications 2400 geng road, ste. 100, palo alto, ca 94303 phone (650) 424-1937, fax (650) 424-1938 this is a production data sheet. see product stat us definitions on web site or in catalog for latest development st atus. description features the IT5025 is a broadband gaas mmic traveling wave amplifier that delivers high output power and moderate gain from 30 khz to 40 ghz. it i s well suited for use as a general- purpose, extremely broadband driver in oc-768 40 gb /s optical communication systems, as well as any broadband application requiring flat gain response and excellent port matches. seven p-hemt cascode stages provide 8 vpp output vo ltage to drive a linbo 3 external modulator. the IT5025 incorporates advanced mbe tec hnology, ti-pt-au gate metallization, silicon nitride passivation, and polyimide for scra tch protection. low-frequency extension capabilities are also provided. frequency range: 30 khz to 40 ghz gain: 10 db gain flatness: 0.7 db output voltage: 8 vpp p1db at 20 ghz: +21 dbm psat at 20 ghz: +23 dbm oc 310 maximum assembly temperature tmax oc -40 to +95 operating case temperature tcase oc 160 operating channel temperature tch dbm 25 rf input power pin w 4 dc power dissipation p dc v 8 second gate voltage vg2 v 3 first gate voltage vg1 ma 500 total drain current idd v 9 positive drain voltage vdd units max. typ. min. parameters/conditions symbol absolute maximum ratings return loss input: C12 db output: C10 db low-frequency operation available in die form
www.iterrac.com IT5025 40-gb/s, 8-vpp optical modulator driver june 9, 2006 doc. 4074 rev 1 2 iterra communications 2400 geng road, ste. 100, palo alto, ca 94303 phone (650) 424-1937, fax (650) 424-1938 this is a production data sheet. see product stat us definitions on web site or in catalog for latest development st atus. dc specifications/ physical properties ma na second gate pinch-off current (v dd = 7.0 v, v g1 = 0.0 v, v g2 = -3.5 v) idoff (v g2 ) ma 55 first gate pinch-off current (v dd =7.0 v, v g1 = -3.5 v, v g2 = open circuit) i dsoff (v g1 ) v na second gate voltage self biased (v dd = 7.0 v, v g1 = 0.0 v, i dd = 10 ma) v g2 v -1.8 first gate pinch-off voltage (v dd = 7.0 v, i dd = 10 ma, v g2 = open circuit) v p ma 420 saturated drain current (v dd =6.0 v, v g1 =0.0 v, v g2 = open circuit) i dss units max typ. min. parameters/conditions symbol 1. measured in wafer form with t chuck = 25 c the IT5025 amplifier is biased with a single positi ve drain supply (vdd) and single negative gate supply (v g1 ). the recommended bias conditions for the IT5025 a re v dd = 7.0 v, i dd = 220 ma. to achieve this drain current level, v g1 is typically biased between C0.4 v and C0.5 v. v g2 must be set at approximately 3.5 v. the gate voltag e (v g1 ) must be applied prior to the drain voltage (v dd ) during power up and removed after the drain voltage is removed during power do wn. drain bias v dd can be applied through an external bias tee at the rf output pad. external coupling capacitors are needed on rfin and rfout ports. the drain bias pad is connected to rfout. biasing and operation v 8 5 voltage control (by means of vd) % 70 30 eye crossing control (by means of vg) v 6.8 power detector output (rf off) v/vpp 0.37 power detector output vpp +8 saturated output voltage vout gb/s 43.5 bit rate ps 10 group delay up to 40 ghz gd db -35 isolation s 12 db -12 output return loss rl out db -15 input return loss rl in db 10 small gain signal s 21 ghz 41 5 3 db bandwidth bw units max. typ. min. parameters/conditions symbol electrical characteristics 1. small signal data measured in wafer form with t=25c. 2. performance may be extended to lower frequencies by means of off-chip circuitry. test conditions: vdd = 7 v, ids(rf) = 210 ma
www.iterrac.com IT5025 40-gb/s, 8-vpp optical modulator driver june 9, 2006 doc. 4074 rev 1 3 iterra communications 2400 geng road, ste. 100, palo alto, ca 94303 phone (650) 424-1937, fax (650) 424-1938 this is a production data sheet. see product stat us definitions on web site or in catalog for latest development st atus. small signal measured performance 10 20 30 40 0 50 -18 -16 -14 -12 -10 -8 -6 -4 -2 0 2 4 6 8 10 12 14 16 18 -20 20 freq, ghz db(s(2,1)) db(s(1,1)) db(s(2,2)) s-parameters group delay 12 22 32 2 40 1.0e-11 2.0e-11 3.0e-11 4.0e-11 5.0e-11 6.0e-11 7.0e-11 8.0e-11 9.0e-11 1.0e-10 1.1e-10 1.2e-10 0.0 1.3e-10 freq, ghz delay(2,1) bias: vdd = 7.0 v, vg1 = -0.5 v, vg2 = 3.4 v, idd = 210 ma external rf choke inductance must be large enough t o cover the lowest operating frequency. see the bonding diagram for recommended bonding connections. off-chip resistor can help reduce the gain at frequency belo w 200 mhz in order to achieve good eye-diagram performance. the auxiliary gate (g2) an d drain (d1) contact pads are used to extend performance below 2 ghz. connect g1 and d1 through large external capacitors to ground to maintain input and output v swr at low frequencies. do not apply bias to these pads. biasing and operation (cont.)
www.iterrac.com IT5025 40-gb/s, 8-vpp optical modulator driver june 9, 2006 doc. 4074 rev 1 4 iterra communications 2400 geng road, ste. 100, palo alto, ca 94303 phone (650) 424-1937, fax (650) 424-1938 this is a production data sheet. see product stat us definitions on web site or in catalog for latest development st atus. pad positions and dimensions all dimensions in m chip size: 2.150 m 10 m x 1.520 m 10 m chip thickness: 104 m 3 m typical bond pad size: 100 x 100 m center-to-center pad spacing: 150 m assembly schematic _in 1 uf
www.iterrac.com IT5025 40-gb/s, 8-vpp optical modulator driver june 9, 2006 doc. 4074 rev 1 5 iterra communications 2400 geng road, ste. 100, palo alto, ca 94303 phone (650) 424-1937, fax (650) 424-1938 this is a production data sheet. see product stat us definitions on web site or in catalog for latest development st atus. optical modulator driver application the IT5025 amplifier has been designed to drive 40 gb/s linbo 3 modulators, providing an output voltage of 8 vpp. in order to achieve the best eye diagram performance, the assembly diagram reported in this data sheet must b e considered and the following bias procedure is recommended: 1.disable rf during the initial biasing 2.set v g1 to C1 v 3.set v g2 to 1 v 4. set v dd to 7 v 5. set v g2 = 3.5 approximately 6. increase vg1 in order to bring current close to 200 to 220 ma (this should correspond to about v g1 = -0.4). 7.apply rf signal at 2 vpp, small decreasing of cur rent can be observed. 8. increase input signal to 3 to 3.5 vpp with outpu t voltage of 8 vpp (current decrease of about 5%) 9. adjust v g1 to center eye crossing. eye diagram test results reported in this data shee t are at a data rate of 43.5 gb/s 43.5 gb/s eye diagram probe test set up
www.iterrac.com IT5025 40-gb/s, 8-vpp optical modulator driver june 9, 2006 doc. 4074 rev 1 6 iterra communications 2400 geng road, ste. 100, palo alto, ca 94303 phone (650) 424-1937, fax (650) 424-1938 this is a production data sheet. see product stat us definitions on web site or in catalog for latest development st atus. eye diagram measured performance waveform at point a waveform at point b input signal 40 gb/s pbrs 2^31 vin = 2.5 vpp rt/ft = 8 ps, jitter rms = 0.51 ps, jitter pp = 4 ps output signal vout = 6.9 vpp, 0 db compression rt/ft = 9.8 ps, jitter rms = 0.9 ps, jitter pp = 5.2 ps bias conditions : vg1 = -0.4 v, vdd = 7 v, vg2 = 3.4 v, idd = 210 m a test set up block diagram
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